Atrenta Announces a New Text Book on RTL Design
Atrenta announced today the availability of a comprehensive textbook on RTL design - “Principles of VLSI RTL Design, A Practical Guide” by Sanjay Churiwala and Sapan Garg. The book, based on the authors' experiences while working at Atrenta’s Noida, India R&D center, targets RTL designers and provides rich information on design practices and how they affect downstream implementation tasks.
“Principles of VLSI RTL Design, A Practical Guide” now available
San Jose, Calif. — May 31, 2011 — Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, today announced the availability of a comprehensive textbook on RTL design. The textbook “Principles of VLSI RTL Design, A Practical Guide”, authored by Sanjay Churiwala and Sapan Garg is being published by Springer Science+Business Media. The book is based on the authors’ experiences while working at Atrenta’s Noida, India R&D center.
“Through our years of work at Atrenta, we had seen a lot of designs and design methodologies. We developed a good understanding of what best practices looked like,” said Sanjay Churiwala. “It was gratifying to be able to put all those ideas down on paper so others can benefit from our experiences.”
The book targets RTL designers and provides rich information on design practices and how they affect downstream implementation tasks. Topics discussed in the text include: reliable RTL construction, clock domain crossings and clock synchronization, design for test and testability, power consumption, static timing analysis, timing exception handling and routing congestion.
“The decisions made by RTL designers can have a profound impact on the schedule and ultimate quality of the chip,” said Sapan Garg. “Through the use of many examples, we highlight how the RTL designer can heavily influence the outcome of any design project.”
The book is available now through Springer.com or at Amazon.com.
About Atrenta
Atrenta is a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries. As one of the largest private electronic design automation companies, Atrenta provides a comprehensive SoC Realization solution that delivers higher quality semiconductor IP, predictable design coherence, automated chip assembly and improved implementation readiness. Its SpyGlass® and GenSys® products and GuideWare reference methodologies open the way for broader deployment of system on chip (SoC) devices in the marketplace, improving time to market, reducing implementation costs and lowering risk. With over 170 customers, including 18 of the top 20 semiconductor and consumer electronics companies, Atrenta enables the most complex SoC designs in the world. Atrenta, the SoC Realization Company. www.atrenta.com. *******************************************************
© 2011 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass and GenSys are registered trademarks of Atrenta Inc. All others are the property of their respective holders.
This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this press release.
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